Indium Corporation’s Sze Pei Lim to Present on Solder Joint Reliability at IMPACT Conference in Taipei

Indium Corporation Senior Global Product Manager for Semiconductor and Advanced Materials, Sze Pei Lim, will be part of a panel presentation at the International Microsystems, Packaging, Assembly and Circuits Technology (IMPACT) conference in Taipei, Taiwan on October 27. The presentation will cover the findings from a technical paper titled The Effects of Voids on Solder Joint Reliability in First Level Interconnect.

First level interconnect (FLI), e.g., flip-chip attach on substrate or wafer, using solder as the interconnect material, is employed extensively in advanced packaging assembly. During the flip-chip die-attach process, some voids are often formed in the solder joints. In the past, this may not have been seen as a major issue since the voiding percentage is typically less than 10%; however, as miniaturization continues, the solder joint of FLI is becoming smaller (<100µm bump or Cu pillar size) with tighter pitch and higher density, there is an increasing concern with how the micro voids in the solder joint will affect the package’s long-term reliability even though the void percentage is not excessive. This paper will describe the details of the different test conditions, and discuss observations from the failure analysis done with cross-sections and electron backscatter diffraction (EBSD) analysis.

As Senior Global Product Manager for Semiconductor and Advanced Materials, Lim works closely with R&D and manufacturing, and engages with the world’s leading semiconductor companies and contract manufacturers. She is a task force member of the International Electronics Manufacturing Initiative (iNEMI) Packaging Technology Integration Group and has co-chaired a number of industry projects and road-mapping initiatives over the past five years. She is also on the executive committee of the Institute of Electrical and Electronics Engineers (IEEE) Packaging Society, Malaysia Chapter. Lim is a part of the organizing committee for the International Electronics Manufacturing Technology (IEMT). She has authored a number of technical papers and presented regularly in various international technical conferences. She holds a bachelor’s degree from the National University of Singapore, where she majored in industrial chemistry with a focus in polymers. She is a Certified SMT Process Engineer and has earned her Six Sigma Green Belt designation.

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