Why miniaturisation will be big
By Clive Ashmore, Senior Process Development Specialist, DEK
Oct 17, 2012
A hundred microns doesn't sound like much. But you wouldn't believe how hard it can be to travel that far when you're operating at the edge of SMT's capabilities. Consider what's happened this year as a result of technology's relentless push for miniaturisation, for instance.
Miniaturisation is, of course, nothing new. The 1.27 mm pitch B.G.A
packages that appeared a decade ago were a huge step up (or down) from the Quad Flat Packages that preceded them. Now we're working with 0.4 mm pitch CSPs and increasingly looking at 0.3 mm. Working at these levels poses a significant challenge for SMT, though. Why? Because not everything is small scale.
Sitting right next to those miniature components you'll find a host of larger items from tantalum capacitors through connectors to SIM card holders. This is heterogeneous assembly at work, and the challenges posed are significant. The principle cause of complaint is the solder paste transfer efficiency of traditional stencils; it simply isn't capable of dealing with these large and very small components at the same time. And the critical factor governing the solder paste transfer efficiency is the stencil area ratio, which according to accepted rules cannot go below 0.66 for traditionally fabricated stencils.
Such were the challenges that it took near enough 15 years, with new generations of materials being released almost every six months, to chip away at that lower level and come up with a new best Area Ratio of 0.5, using electroformed stencils. This equates to a 200 μm aperture on a 100 μm foil. But below that range, where you need to put solder paste through sub-200 μm apertures, even a 0.5 area ratio won't really pass muster.
This dilemma had been foreseen at DEK and about 24 we made it a priority to find a solution. We looked at options such as step stencils but figured they would not be suitable for high-volume applications. So we decided to tear up the existing stencil area ratio rulebook and try a new approach. The result, ProActiv, a solution which extends the print process window to a level that allows for the consistent printing of small apertures such as 0.3mm CSPs and 01005 passives alongside larger devices utilising a standard 100 micron thick stencil foil.
Using design features such as an active squeegee, which allows us to shear thin the solder paste more efficiently and results in a much better packing density with sub-200 μm apertures, ProActiv has doubled the last 15 years' advances in stencil aperture area ratios (almost) overnight, to produce an astonishing sub 0.4 Area Ratio capability.
This is a huge achievement, but it wasn't the only notable milestone to do with miniaturisation in recent years. We have also seen significant strides in high-yield processing, for example. Original equipment and contract manufacturers have a clear requirement to maximise the return on their investment in printers, which means using them for their intended purpose - printing - with as little downtime as possible.
Printing not wiping
Here the quest for miniaturisation created another problem. As the distance between components has decreased, so has the propensity for under stencil bridging. The miniaturisation road map has component interspacing breaking the 100 micron barrier, to put this into context we soon could be asked to image 0.3mm CSP deposits within 100 microns of a RF can. At these distances, even minimal solder paste bridging would lead to product defects. To avoid this, stencils are now routinely cleaned after every few prints or so.
Although it is difficult to evaluate precisely, and can vary considerably depending on factors such as machine setup and the operator's experience, there's little doubt that this is relatively time-consuming process. While a print pass typically takes 12 to 15 seconds, for instance, an average dry-cycle clean takes around 20 seconds, and anything above that could easily take 30 seconds or so. Net result? Manufacturers are investing in printers and then spending most of their time using them as cleaning systems.
Clearly this is an area that needs addressing. So we came up with a solution in the form of Nano-ProTek, a breakthrough stencil coating technology that delivers high-performance stencils in a cost-effective wipe to overcome today's challenging stencil architectures.
Extremely easy to apply, the technology is based on a unique proprietary formula that renders the entire stencil surface 'fluxophobic' (that is, the product forms a chemical bond with the stencil surface to reduce the tendency of the flux to wet across the stencil webs).
The technology creates a barrier around the individual apertures which prevents wet solder paste bridging. As a result the area outside the apertures become less soiled which reduces the need to activate the under stencil cleaner. The result is less time taken with unproductive cleaning cycles, reduced consumables cost, a more stable print process leading the higher efficiency at a higher yield rate.
The application of Nano-ProTek can be carried out by factory personnel and forms a chemical bond with both stainless steel and nickel stencils.
By reducing defects such as bridging and solder balling, while also reducing cleaning requirements, Nano-ProTek represents a major step forward in manufacturers' ability to achieve high yield processing within the landscape of miniaturisation.
Can we expect to see equivalent advances in SMT in the future? I think so.
In the coming months, miniaturisation will continue to drive innovation. With 0.3 mm pitch CSPs on the horizon, and customers starting to do internal investigations, we are already being asked about the next step, 0.25 mm, which will of course bring further challenges. Similarly, with imperial 01005 capacitors having been on the market for some 12 to 18 months, we are now looking at 01005 metric, which is half the size.
Another area which is likely to be topical in the future is cavity printing. Again, this responds to the continuing need to pack more functionality into products that are the same size or smaller than their predecessors.
Cavity printing is essentially about embedding components within the millimeter-thick organic substrate board instead of on top of it. And it might not only apply to boards; as competition for computing real estate grows, we could be tasked with embedding components into substrates such as batteries or LCD screens.
Packaging the future
Finally, one more topic that SMT watchers will want to keep an eye on in the near future is package-on-package; the integrated circuit packaging methodology used to combine vertically discrete logic and memory ball grid array packages.
Essentially, packages are stacked on top of each other with a standard interface to route signals between them, once more to achieve a higher component density in devices. Many manufacturers are starting to look closely at this issue. And while on the surface it may not seem to hold any particular printing challenge; the truth is that printing is of fundamental importance to the process given that the integrity of the assembly relies on the printed interconnects of the foundation package. Therefore any failure generated from the printing process within the foundation package renders the subsequent stack defective, leading to high cost write off.
Therefore, package on package demands precision printing of the highest order - a feat that can only be achieved with newly unveiled technologies such as ProActiv
How quickly manufacturers will be able to capitalise on the potential of the technologies that have emerged in recent months remains to be seen. What is already clear, though, is that SMT in 2013 and beyond could be every bit as exciting as the groundbreaking years we have just left behind.
About the author
Clive Ashmore current responsible is developing future technologies within DEK. Preceding this post Clive managed the global applications group at DEK for 8 years.
Prior to joining DEK in 1998, Clive held senior process and manufacturing engineering posts at Ericsson and Philips. He specialises in all aspects of manufacturing engineering, with special emphasis over the last ten years on mass imaging technologies. Clive has also done extensive research in other areas of surface mount assembly, quality engineering and equipment analysis. One of Clive's most recent highlights has been the invention of a new printing method for stencil printing rheological materials (ProActiv).