Agilent offers web seminar
Mar 08, 2004
Agilent Technologies has announced a web seminar showing a new methodology for concurrent system and circuit level design and verification, beginning with partitioned simulations of a WLAN transceiver, and system-level verification of EVM & BER specifications.
Developing ICs with more functionality, smaller dimensions, and lower development costs, requires a unified approach. The final designs that are produced by this methodology have a higher chance of first pass success, and require less time with fewer design resources.
The seminar takes place on March 25, 2004 9:00am-10:00am PT
For more information, visit http://webevents.broadcast.com/cmp/wcs/index.asp?event_id=12154