Teradyne`s Tiger Selected for National Semiconductor`s

Teradyne announced National Semiconductor Corporation (NSC) of Santa Clara, CA has purchased a Tiger test system for characterization and multi-site production test of System-on-Chip (SOC) devices with multi-Giga-bit interfaces. The selection of Tiger was based on the system's advanced capability to provide the new accuracy, speed and repeatability requirements for National Semiconductor's next generation high-speed communications devices. "The Tiger was the logical next step forward to handle the digital needs for higher speeds, differential pins, and higher pin count, while keeping the great array of Catalyst analog instruments," said Affif Farhat, SerDes Product Test Development Manager, National Semiconductor. "In addition to meeting new accuracy, speed and repeatability requirements for our devices, Tiger provides the lowest overall cost of ownership compared to other new test platforms," concluded Guy Nicholson, Director of SerDes Product and Test Engineering, National Semiconductor. "Our new Giga-bit speed display devices required Tiger's precision high speed differential pin electronics," said Dennis Chan, Display Products Test Development Manager, National Semiconductor. "Being able to easily migrate to the next generation Catalyst platform was important to our test development productivity," added Steve Ichikawa, Director of Product and Test Engineering, National Semiconductor. "With Tiger any digital pin can be licensed at any speed. National Semiconductor will pay for what they need - when they need it," said Rob Mosher, Product Marketing Manager, Teradyne. "Tiger is designed to meet changing test needs. As NSC test demands evolve with the next-generation of communications devices, Tiger is ready."