Speedline to present webinar on printing solder paste for flip chip bumps
Jun 07, 2007
Each month, Speedline Technologies offers a webinar free of charge on a topic relevant to process engineers in OEM and contract electronics manufacturing. On Thursday, July 19, 2007, a webcast will be offered on stencil printing solder paste for the formation of solder bumps. The presentation lasts one hour and commences at 11:00 am Eastern time.
A common method used to create bumps on flip chips is printing solder paste directly on to the silicon wafers, followed by reflow soldering. Printing solder paste for flip chip bumps requires a very accurate, repeatable printing process. The correct volume of solder paste must be printed on each input/output pad of the wafer to ensure a consistent flip chip bump height. If this height is not precisely controlled, defects in the attachment of the flip chip to the substrate will occur.
This webinar will review all aspects of the bump printing process including stencil design, solder paste selection, fixturing and printing parameters. In addition, optimization of the related reflow soldering process will be discussed.
To register for the Speedline webcast seminars, go to www.speedlinetech.com/seminars and complete the short contact information form.